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_______________________________________________________________ maxim integrated products 1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com. max4936Cmax4939 octal high-voltage transmit/receive switches 19-5541; rev 1; 3/11 ordering information/selector guide general description the max4936Cmax4939 are octal, high-voltage, transmit/ receive (t/r) switches. the t/r switches are based on a diode bridge topology, and the amount of current in the diode bridges can be programmed through an spi k interface. all devices feature a latch-clear input to asynchronously turn off all t/r switches and put the device into a low-power shutdown mode. the max4936/ max4938 include the t/r switch and grass-clipping diodes, performing both transmit and receive operations. the max4937/max4939 include just the t/r switch and perform the receive operation only. the max4936/max4938 transmit path is low impedance during high-voltage transmit and high impedance during low-voltage receive, providing isolation between transmit and receive circuitry. the high-voltage transmit path is high bandwidth, low distortion, and low jitter. the receive path for all devices is low impedance dur - ing low-voltage receive and high impedance during high-voltage transmit, providing protection to the receive circuitry. the low-voltage receive path is high bandwidth, low noise, low distortion, and low jitter. each t/r switch can be individually programmed on or off, allowing these devices to also be used as receive path multiplexers. the max4936/max4937 feature clamping diodes to protect the receiver input from voltage spikes due to leakage currents flowing through the t/r switches dur - ing transmission. the max4938/max4939 do not have clamping diodes and rely on clamping diodes integrated in the receiver front end. all devices are available in a small, 56-pin, 5mm x 11mm tqfn package, and are specified over the commercial 0 n c to +70 n c temperature range. features s low power: low impedance (5 ) with 1.5ma bias current only s low noise < 0.5nv/ hz (typ) with 1.5ma bias current only s wide -3db bandwidth 65mhz (typ) s easy programming with spi interface s high density (8 channels per package) s grass-clipping diodes with low-voltage isolation (max4936/max4938) s output clamp diodes for receiver protection (max4936/max4937) s global shutdown control (clr) s each t/r switch can be individually programmed on or off s low-voltage receive path with high-voltage protection s space-saving, 5mm x 11mm, 56-pin tqfn package applications medical/industrial imaging ultrasound high-voltage transmit and low-voltage isolation spi is a trademark of motorola, inc. + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. **future product contact factory for availability. part low-voltage isolation high-voltage protection output clamp temp range pin-package max4936 ctn+ yes yes yes 0 n c to +70 n c 56 tqfn-ep* max4937 ctn+ no yes yes 0 n c to +70 n c 56 tqfn-ep* max4938 ctn+** yes yes no 0 n c to +70 n c 56 tqfn-ep* max4939 ctn+** no yes no 0 n c to +70 n c 56 tqfn-ep*
2 ______________________________________________________________________________________ max4936Cmax4939 octal high-voltage transmit/receive switches stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. (all voltages referenced to gnd, unless otherwise noted.) v dd positive supply voltage ................................... -0.3v to +6v v cc , lvcc_ positive supply voltage .................... -0.3v to +6v v ee , lvee_ negative supply voltage .................... -6v to +0.3v clk, din, clr, le input voltage .......................... -0.3v to +6v dout output voltage .............................. -0.3v to (v dd + 0.3v) hv_ input voltage (max4936/max4938) .......... -120v to +120v com_ input/output voltage ............................... -120v to +120v no_ output voltage (max4936/max4937) ...................... q 1.5v no_ output voltage (max4938/max4939) ......................... q 6v voltage difference across any or all hv_ (max4936/max4938) ...................................... q 230v voltage difference across any or all com_ .................. q 230v continuous current (hv_ to com_ ) (max4936/max4938) .. q 250ma continuous current (any other terminal) ..................... q 100ma peak current (hv_ to com_ ) (max4936/max4938) (pulsed at 1ms, 0.1% duty cycle) ................................ q 2.5a c ontinuous power dissipation (t a = +70 n c) tqfn (derate 41.0mw/ n c above +70 n c) ................. 3279mw operating temperature range ............................. 0 n c to +70 n c storage temperature range ............................ -65 n c to +150 n c junction temperature ................................................... +150 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ...................................... +260 n c electrical characteristics (v dd = +1.62v to +5.5v, v cc = +2.7v to +5.5v, v ee = -2.7v to -5.5v, v clr = 0v, lvcc_ = v cc , lvee_ = v ee , t a = t min to t max , unless otherwise noted. typical values are at t a = +25 n c.) (note 2) absolute maximum ratings note 1: package thermal resistance were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial . package thermal characteristics (note 1) tqfn junction-to-ambient thermal resistance ( q ja ) ........... 44c/w junction-to-case thermal resistance ( q jc ) ................. 10c/w parameter symbol conditions min typ max units static characteristics hv_ input voltage range v irhv_ max4936/max4938 only -115 +115 v |difference across any or all hv_ | max4936/max4938 only 220 v com_ output voltage range v orcm_ |v hv_ | r +2v, i hv_ = q 100ma (max4936/ max4938 only) v hv_ - 1 v hv_ q 0.85 v hv_ + 1 v com_ input voltage range v ircm_ -115 +115 v |difference across any or all com_ | 220 v no_ output voltage range v orno_ v cc = +5v, v ee = -5v, |v com_ | r +2v, r l = 200 i , c l = 30pf, i ch_ = 10ma (max4936/max4937 only) -1 q 0.75 +1 v v cc = +5v, v ee = -5v, |v com_ | < +0.4v, r l = 200 i , c l = 30pf, i ch_ = 1.5ma v com_ - 0.2 v com_ q 0.1 v com_ + 0.2 hv_ to com_ continuous current i cn_ v com_ = 0v (max4936/max4938 only) -200 +200 ma hv_ to com_ drop v cn_ v com_ = 0v, i cn_ = q 2a (max4936/max4938 only) q 2 v diode bridge voltage offset v off_ v cc = +5v, v ee = -5v, com_ = unconnected, no_ = unconnected, i ch = 1.5ma -200 +200 mv
_______________________________________________________________________________________ 3 max4936Cmax4939 octal high-voltage transmit/receive switches electrical characteristics (continued) (v dd = +1.62v to +5.5v, v cc = +2.7v to +5.5v, v ee = -2.7v to -5.5v, v clr = 0v, lvcc_ = v cc , lvee_ = v ee , t a = t min to t max , unless otherwise noted. typical values are at t a = +25 n c.) (note 2) parameter symbol conditions min typ max units hv_ off-leakage current i lhv_ |v hv_ - v com_ | < + 0.3v, v com_ = 0v (max4936/max4938 only) -3 +3 f a com_ off-leakage current i lcom_ |v hv_ - v com_ | < +0.3v, v hv_ = 0v, switch is off (max4936/max4938 only) -3 +3 f a hv_ = unconnected, switch is off (max4936/max4938 only) -1 +1 f a switch is off (max4937/max4939 only) -1 +1 f a no_ off-leakage current i lno_ |v no_ | < +0.3v, switch is off max4936/max4937 -2 +2 f a max4938/max4939 -1 +1 dynamic characteristics diode bridge turn-on time t on v cc = +5v, v ee = -5v, r l = 200 i , i ch = 1.5ma, c l = 30pf, v com_ = q 0.4v, figure 1 200 ns diode bridge turn-off time t off v cc = +5v, v ee = -5v, r l = 200 i , i ch = 1.5ma, c l = 30pf, v com_ = q 0.4v, figure 1 5 m s reverse recovery time t rr i fwd = i rvr = 10ma 450 ns spi power-up delay t dly 500 f s small-signal com_ to no_ on impedance r icom_ v cc = +5v, v ee = -5v, v no_ = 0v, i ch = 1.5ma, f = 5mhz 4.5 i -3db bandwidth bw com_ to no_, switch is on, |v com_ | < +0.4v, v cc = +5v, v ee = -5v, r l = 200 i , c l = 30pf, i ch = 1.5ma 65 mhz off-isolation v iso hv_ to com_, |v hv_ - v com_ | < +0.3v, v cc = +5v, v ee = -5v, r l = 100 i , c l = 100pf, f = 1mhz (max4936/max4938 only) -50 db com_ to no_, switch is off, v cc = +5v, v ee = -5v, r l = 200 i , c l = 30pf, f = 1mhz -75 crosstalk v ct between any two hv_ to com_ channels, |v hv_ | r +2v, v cc = +5v, v ee = -5v, r l = 100 i , c l = 100pf, f = 5mhz (max4936/max4938 only) -60 db between any two com_ to no_ channels, switch is on, |v com_ | < +0.4v, v cc = +5v, v ee = -5v, r l = 200 i , c l = 30pf, i ch = 1.5ma, f = 5mhz -71
4 ______________________________________________________________________________________ max4936Cmax4939 octal high-voltage transmit/receive switches electrical characteristics (continued) (v dd = +1.62v to +5.5v, v cc = +2.7v to +5.5v, v ee = -2.7v to -5.5v, v clr = 0v, lvcc_ = v cc , lvee_ = v ee , t a = t min to t max , unless otherwise noted. typical values are at t a = +25 n c.) (note 2) parameter symbol conditions min typ max units 2nd harmonic distortion hd2 hv_ to com_, |v com_ | r +2v, v cc = +5v, v ee = -5v, r l = 100 i , c l = 100pf, f = 5mhz (max4936/max4938 only) -90 dbc com_ to no_, switch is on, |v com_ | < +0.4v, v cc = +5v, v ee = -5v, r l = 200 i , c l = 30pf, i ch = 1.5ma, f = 5mhz -95 3rd harmonic distortion hd3 hv_ to com_, |v com_ | r +2v, v cc = +5v, v ee = -5v, r l = 100 i , c l = 100pf, f = 5mhz (max4936/max4938 only) -90 dbc com_ to no_, switch is on, |v com_ | < + 0.4v, v cc = +5v, v ee = -5v, r l = 200 i , c l = 30pf, i ch = 1.5ma, f = 5mhz -115 two-tone intermodulation distortion (note 3) imd3 com_ to no_, switch is on, |v com_ | < +0.4v, v cc = +5v, v ee = -5v, r l = 200 i , c l = 30pf, i ch = 1.5ma, f 1 = 5mhz, f 2 = 5.01mhz -77 dbc hv_ off capacitance c hv_(off) |v hv_ - v com_ | < +0.3v (max4936/max4938 only) 12 pf com_ off capacitance c com_(off) |v hv_ - v com_ | < +0.3v, switch is off (max4936/max4938 only) 17 pf switch is off (max4937/max4939 only) 12 no_ on capacitance c no_(on) |v no_ | < +0.4v, switch is on 20 pf no_ off capacitance c no_(off) |v no_ | < +0.4v, switch is off 7.5 pf digital i/os (clr, din, dout, clk, le ) input high voltage v ih v dd = +2.25v to +5.5v v dd - 0.5 v v dd = +1.62v to +1.98v 1.4 input low voltage v il v dd = +2.25v to +5.5v 0.6 v v dd = +1.62v to +1.98v 0.4 input hysteresis v hyst v dd = +3v 50 mv v dd = +1.8v 90 input leakage current i il clr, din, clk, le = gnd or v dd -1 +1 f a input capacitance c in 5 pf dout low voltage v ol i sink = 5ma 0.4 v dout high voltage v oh i source = 5ma v dd - 0.4 v power supply (v dd , v cc , v ee ) positive logic supply voltage v dd +1.62 +5.5 v positive analog supply voltage v cc +2.7 +5.5 v negative analog supply voltage v ee -5.5 -2.7 v
_______________________________________________________________________________________ 5 max4936Cmax4939 octal high-voltage transmit/receive switches electrical characteristics (continued) (v dd = +1.62v to +5.5v, v cc = +2.7v to +5.5v, v ee = -2.7v to -5.5v, v clr = 0v, lvcc_ = v cc , lvee_ = v ee , t a = t min to t max , unless otherwise noted. typical values are at t a = +25 n c.) (note 2) note 2: all specifications are 100% production tested at t a = +70 n c, unless otherwise noted. specifications at 0 n c are guaran - teed by design. note 3: see the ultrasound-specific imd3 specification section. parameter symbol conditions min typ max units positive logic supply current i dd clr, din, clk, le = gnd or v dd +1 f a positive analog supply current i cc per channel, switch is on, v cc = +5v, v ee = -5v, i ch = 1.5ma +1.15 +1.5 +2 ma positive analog shutdown supply current i cc_shdn clr = high +1 f a negative analog supply current i ee per channel, switch is on, v cc = +5v, v ee = -5v, i ch = 1.5ma -2 -1.5 -1.15 ma negative analog shutdown supply current i ee_shdn clr = high -1 f a on power-supply rejection ratio psrr on v cc to no_ or v ee to no_, switch is on, v cc = +5v, v ee = -5v, r l = 200 i , c l = 30pf, i ch = 1.5ma, f = 1mhz -77 db off power-supply rejection ratio psrr off v cc to no_ or v ee to no_, switch is off, v cc = +5v, v ee = -5v, r l = 200 i , c l = 30pf, f = 1mhz -80 db logic timing (clr, din, dout, clk, le ) (figure 1) clk period t cp v dd = 3v q 10% 50 ns v dd = 1.8v q 10% 100 clk high time t ch v dd = 3v q 10% 20 ns v dd = 1.8v q 10% 45 clk low time t cl v dd = 3v q 10% 20 ns v dd = 1.8v q 10% 45 clk to dout delay t do v dd = 3v q 10%, c l p 20pf 3 30 ns v dd = 1.8v q 10%, c l p 20pf 7 70 din to clk setup time t ds v dd = 3v q 10% 10 ns v dd = 1.8v q 10% 16 din to clk hold time t dh v dd = 3v q 10% 4 ns v dd = 1.8v q 10% 4 clk to le setup time t cs v dd = 3v q 10% 36 ns v dd = 1.8v q 10% 65 le low pulse width t wl v dd = 3v q 10% 14 ns v dd = 1.8v q 10% 22 clr high pulse width t wc v dd = 3v q 10% 20 ns v dd = 1.8v q 10% 40
6 ______________________________________________________________________________________ max4936Cmax4939 octal high-voltage transmit/receive switches figure 1. serial interface timing din le clk dout t/r switch off on clr 50% 50% 50% 50% 50% 50% 50% 50% 50% 90% 10% t wl t dh t ds t do t cs t off t on t wc d n d n + 1 d n - 1
_______________________________________________________________________________________ 7 max4936Cmax4939 octal high-voltage transmit/receive switches typical operating characteristics (v dd = +3v, v cc = +5v, v ee = -5v, i ch = 1.5ma, r com_ = 200 i , r no_ = 200 i , f = 5mhz, v clr = 0v, t a = +25 n c, unless other - wise noted.) com_ to no_ crosstalk vs. frequency max4936-39 toc06 frequency (mhz) crosstalk (db) -90 -80 -70 -60 -100 1 10 r no_ = 200 r com_ = 200 com_ to no_ impedance vs. frequency max4936-39 toc05 frequency (mhz) com_ to no_ impedance () 15 10 5 1 2 3 4 5 6 7 8 9 0 0 20 i ch = 1.5ma i ch = 3ma com_ to no_ small-signal transfer function vs. frequency max4936-39 toc04 frequency (mhz) com_ to no_ attenuation (db) 15 10 5 -1.0 -0.5 0 -1.5 0 20 r no_ = 50 i ch = 1.5ma i ch = 3ma i cc_shdn , ? i ee_shdn ? supply shutdown current vs. temperature max4936-39 toc03 temperature (c) i cc_shdn , ? i ee_shdn ? shutdown current (a) 56 42 28 14 0.05 0.10 0.15 0.20 0 0 70 i cc , ? i ee ? supply current vs. temperature max4936-39 toc02 temperature (c) i cc , ? i ee ? supply current (ma) 60 35 10 -15 1.25 1.50 1.75 2.00 1.00 -40 85 one channel on i cc , ? i ee ? supply current vs. v cc , ? v ee ? supply voltage max4936-39 toc01 v cc , ? v ee ? supply voltage (v) i cc , ? i ee ? supply current (ma) 5.5 5.0 4.5 4.0 3.5 0.5 1.0 1.5 2.0 0 3.0 2.5 one channel on
8 ______________________________________________________________________________________ max4936Cmax4939 octal high-voltage transmit/receive switches typical operating characteristics (continued) (v dd = +3v, v cc = +5v, v ee = -5v, i ch = 1.5ma, r com_ = 200 i , r no_ = 200 i , f = 5mhz, v clr = 0v, t a = +25 n c, unless other - wise noted.) com_/no_ vs. time for clr toggling from v dd to gnd to v dd max4936-39 toc11 200s/div no_load = 200 ?? 30pf com_load = 200 v com_ 5mv/div v no_ 5mv/div hv_/com_ vs. time max4936-39 toc10 100ns/div com_load = 100 ?? 100pf v hv_ 50v/div v com_ 50v/div com_/no_ fft vs. frequency (2mhz gaussian signal at com_) max4936-39 toc09 frequency (mhz) com_/no_ fet (db) 10 5 -60 -40 -20 0 -80 0 15 r no_ = 50 com_ no_ com_/no_ small signal vs. time (2mhz gaussian signal at com_) max4936-39 toc08 time (ms) voltage (v) 4 3 -4 -3 -2 0 1 -1 2 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 -0.08 -5 5 r no_ = 50 com_ no_ psrr vs. frequency max4936-39 toc07 frequency (mhz) psrr (db) -80 -75 -70 -85 1 10 r no_ = 200 r com_ = 200 psrr_v ee psrr_v cc
_______________________________________________________________________________________ 9 max4936Cmax4939 octal high-voltage transmit/receive switches pin configuration pin description top view max4936/max4938 21 22 23 24 25 26 27 28 hv1 *ep com1 n.c. gnd clr le lvcc1 no1 hv8 com8 gnd clk din dout lvcc8 no8 48 47 46 45 44 43 54 53 56 55 52 51 50 49 1 + 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 42 41 40 39 38 37 36 35 34 33 32 31 30 29 gnd hv5 com5 v ee v cc v dd n.c. hv7 com7 com6 hv6 n.c. hv4 com4 n.c. hv3 com3 n.c. hv2 com2 no5 lvcc5 lvee6 lvee5 lvee4 no4 no7 lvcc7 lvee8 lvee7 lvcc6 no6 lvcc4 lvee3 no3 lvcc3 lvee2 no2 lvcc2 lvee1 max4937/max4939 tqfn (5mm 11mm) 21 22 23 24 25 26 27 28 n.c. *ep *connect ep to gnd. com1 n.c. gnd clr le lvcc1 no1 n.c. com8 gnd clk din dout lvcc8 no8 48 47 46 45 44 43 54 53 56 55 52 51 50 49 1 + 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 42 41 40 39 38 37 36 35 34 33 32 31 30 29 gnd n.c. com5 v ee v cc v dd n.c. n.c. com7 com6 n.c. n.c. n.c. com4 n.c. n.c. com3 n.c. n.c. com2 no5 lvcc5 lvee6 lvee5 lvee4 no4 no7 lvcc7 lvee8 lvee7 lvcc6 no6 lvcc4 lvee3 no3 lvcc3 lvee2 no2 lvcc2 lvee1 pin name function max4936/ max4938 max4937/ max4939 1 1 com2 t/r switch 2 input. when the switch is on, low-voltage signals are passed through from com2 to no2, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked. 2 hv2 t/r switch 2 input. com2 follows hv2 when high-voltage signals are present on hv2. hv2 is isolated from com2 when low-voltage signals are present on com2.
10 _____________________________________________________________________________________ max4936Cmax4939 octal high-voltage transmit/receive switches pin description (continued) pin name function max4936/ max4938 max4937/ max4939 3, 6, 15, 18, 54 2, 3, 5, 6, 8, 13, 15, 16, 18, 19, 21, 54, 56 n.c. no connection. not internally connected. 4 4 com3 t/r switch 3 input. when the switch is on, low-voltage signals are passed through from com3 to no3, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked. 5 hv3 t/r switch 3 input. com3 follows hv3 when high-voltage signals are present on hv3. hv3 is isolated from com3 when low-voltage signals are present on com3. 7 7 com4 t/r switch 4 input. when the switch is on, low-voltage signals are passed through from com4 to no4, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked. 8 hv4 t/r switch 4 input. com4 follows hv4 when high-voltage signals are present on hv4. hv4 is isolated from com4 when low-voltage signals are present on com4. 9 9 v dd positive logic supply. bypass v dd to gnd with a 1 f f or greater ceramic capacitor as close as possible to the device. 10 10 v cc positive analog supply. bypass v cc to gnd with a 1 f f or greater ceramic capacitor as close as possible to the device. 11 11 v ee negative analog supply. bypass v ee to gnd with a 1 f f or greater ceramic capacitor as close as possible to the device. 12, 23, 53 12, 23, 53 gnd ground 13 hv5 t/r switch 5 input. com5 follows hv5 when high-voltage signals are present on hv5. hv5 is isolated from com5 when low-voltage signals are present on com5. 14 14 com5 t/r switch 5 input. when the switch is on, low-voltage signals are passed through from com5 to no5, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked. 16 hv6 t/r switch 6 input. com6 follows hv6 when high-voltage signals are present on hv6. hv6 is isolated from com6 when low-voltage signals are present on com6. 17 17 com6 t/r switch 6 input. when the switch is on, low-voltage signals are passed through from com6 to no6, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked. 19 hv7 t/r switch 7 input. com7 follows hv7 when high-voltage signals are present on hv7. hv7 is isolated from com7 when low-voltage signals are present on com7. 20 20 com7 t/r switch 7 input. when the switch is on, low-voltage signals are passed through from com7 to no7, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked. 21 hv8 t/r switch 8 input. com8 follows hv8 when high-voltage signals are present on hv8. hv8 is isolated from com8 when low-voltage signals are present on com8. 22 22 com8 t/r switch 8 input. when the switch is on, low-voltage signals are passed through from com8 to no8, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked.
______________________________________________________________________________________ 11 max4936Cmax4939 octal high-voltage transmit/receive switches pin description (continued) pin name function max4936/ max4938 max4937/ max4939 24 24 clk serial-clock input 25 25 din serial-data input 26 26 dout serial-data output 27 27 lvcc8 inductor v cc connection. connect an inductor between lvcc8 and v cc to improve noise performance, otherwise connect lvcc8 to v cc . 28 28 no8 t/r switch 8 output. when the switch is on, low-voltage signals are passed through from com8 to no8, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked. no8 is limited with clamping diodes on max4936/max4937. 29 29 lvee8 inductor v ee connection. connect an inductor between lvee8 and v ee to improve noise performance; otherwise, connect lvee8 to v ee . 30 30 lvcc7 inductor v cc connection. connect an inductor between lvcc7 and v cc to improve noise performance; otherwise, connect lvcc7 to v cc . 31 31 no7 t/r switch 7 output. when the switch is on, low-voltage signals are passed through from com7 to no7, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked. no7 is limited with clamping diodes on max4936/max4937. 32 32 lvee7 inductor v ee connection. connect an inductor between lvee7 and v ee to improve noise performance; otherwise, connect lvee7 to v ee . 33 33 lvcc6 inductor v cc connection. connect an inductor between lvcc6 and v cc to improve noise performance; otherwise, connect lvcc6 to v cc . 34 34 no6 t/r switch 6 output. when the switch is on, low-voltage signals are passed through from com6 to no6, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked. no6 is limited with clamping diodes on max4936/max4937. 35 35 lvee6 inductor v ee connection. connect an inductor between lvee6 and v ee to improve noise performance; otherwise, connect lvee6 to v ee . 36 36 lvcc5 inductor v cc connection. connect an inductor between lvcc5 and v cc to improve noise performance; otherwise, connect lvcc5 to v cc . 37 37 no5 t/r switch 5 output. when the switch is on, low-voltage signals are passed through from com5 to no5, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked. no5 is limited with clamping diodes on max4936/max4937. 38 38 lvee5 inductor v ee connection. connect an inductor between lvee5 and v ee to improve noise performance; otherwise, connect lvee5 to v ee . 39 39 lvee4 inductor v ee connection. connect an inductor between lvee4 and v ee to improve noise performance; otherwise, connect lvee4 to v ee . 40 40 no4 t/r switch 4 output. when the switch is on, low-voltage signals are passed through from com4 to no4, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked. no4 is limited with clamping diodes on max4936/max4937.
12 _____________________________________________________________________________________ max4936Cmax4939 octal high-voltage transmit/receive switches pin description (continued) pin name function max4936/ max4938 max4937/ max4939 41 41 lvcc4 inductor v cc connection. connect an inductor between lvcc4 and v cc to improve noise performance; otherwise, connect lvcc4 to v cc . 42 42 lvee3 inductor v ee connection. connect an inductor between lvee3 and v ee to improve noise performance; otherwise, connect lvee3 to v ee . 43 43 no3 t/r switch 3 output. when the switch is on, low-voltage signals are passed through from com3 to no3, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked. no3 is limited with clamping diodes on max4936/max4937. 44 44 lvcc3 inductor v cc connection. connect an inductor between lvcc3 and v cc to improve noise performance; otherwise, connect lvcc3 to v cc . 45 45 lvee2 inductor v ee connection. connect an inductor between lvee2 and v ee to improve noise performance; otherwise, connect lvee2 to v ee . 46 46 no2 t/r switch 2 output. when the switch is on, low-voltage signals are passed through from com2 to no2, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked. no2 is limited with clamping diodes on max4936/max4937. 47 47 lvcc2 inductor v cc connection. connect an inductor between lvcc2 and v cc to improve noise performance; otherwise, connect lvcc2 to v cc . 48 48 lvee1 inductor v ee connection. connect an inductor between lvee1 and v ee to improve noise performance; otherwise, connect lvee1 to v ee . 49 49 no1 t/r switch 1 output. when the switch is on, low-voltage signals are passed through from com1 to no1, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked. no1 is limited with clamping diodes on max4936/max4937. 50 50 lvcc1 inductor v cc connection. connect an inductor between lvcc1 and v cc to improve noise performance; otherwise, connect lvcc1 to v cc . 51 51 le active-low latch-enable input. drive le low to change the contents of the latch and update the state of the switches. drive le high to hold the contents of the latch. 52 52 clr active-high latch-clear input. drive clr high to clear the contents of the latch and disable all the switches. when clr is driven high, the device enters shutdown mode. clr does not affect the contents of the register. 55 55 com1 t/r switch 1 input. when the switch is on, low-voltage signals are passed through from com1 to no1, while high-voltage signals are blocked. when the switch is off, both low-voltage and high-voltage signals are blocked. 56 hv1 t/r switch 1 input. com1 follows hv1 when high-voltage signals are present on hv1. hv1 is isolated from com1 when low-voltage signals are present on com1. ep exposed pad. internally connected to gnd. connect ep to a large ground plane to maximize thermal performance. do not use ep as the only gnd connection.
______________________________________________________________________________________ 13 max4936Cmax4939 octal high-voltage transmit/receive switches figure 2. spi logic detailed description the max4936Cmax4939 are octal, high-voltage trans - mit/receive (t/r) switches. the t/r switches are based on a diode bridge topology, and the amount of current in the diode bridges can be programmed through an spi interface. all devices feature a latch-clear input to asynchronously turn off all t/r switches and put the device into a low-power shutdown mode. the max4936/ max4938 include the t/r switch and grass-clipping diodes, performing both transmit and receive operations. the max4937/max4939 include just the t/r switch and perform the receive operation only. the max4936/max4938 transmit path is low impedance during high-voltage transmit and high impedance during low-voltage receive, providing isolation between transmit and receive circuitry. the high-voltage transmit path is high bandwidth, low distortion, and low jitter. the receive path for all devices is low impedance dur - ing low-voltage receive and high impedance during high-voltage transmit, providing protection to the receive circuitry. the low-voltage receive path is high bandwidth, low noise, low distortion, and low jitter. each t/r switch can be individually programmed on or off, allowing these devices to also be used as receive path multiplexers. the max4936/max4937 feature clamping diodes to protect the receiver input from voltage spikes due to leakage currents flowing through the t/r switches dur - ing transmission. the max4938/max4939 do not have clamping diodes and rely on clamping diodes integrated in the receiver front-end. serial interface all the devices are controlled by a serial interface with a 12-bit serial shift register and transparent latch (figure 2). each of the first 4 data bits controls the bias current into the diode bridges (see figure 3 and table 2), while the remaining 8 data bits control a t/r switch (table 1). data on din is clocked with the most significant bit (msb) first into the shift register on the rising edge of clk. data is clocked out of the shift register onto dout on the rising edge of clk. dout reflects the status of din, delayed by 12 clock cycles (figure 4). transmit/receive switch the t/r switch is based on a diode bridge topology. the amount of bias current into each diode bridge is adjust - able by setting the s0Cs3 switches through the serial interface (see figure 3 and table 2). latch enable ( le ) drive le logic-low to change the contents of the latch and update the state of the t/r switches (figure 4). drive le logic-high to hold the contents of the latch and prevent changes to the switches states. to reduce noise due to clock feedthrough, drive le logic-high while data is clocked into the shift register. after the data shift reg - ister is loaded with valid data, pulse le logic-low to load the contents of the shift register into the latch. functional diagram d0 d1 d10 d11 register din on1 on2 s2 s3 clk clr dout le latch spi logic *low-voltage isolation diodes available on max4936/max4938 only. **output clamp diodes available on max4936/max4937 only. max4936?max4939 spi logic v dd gnd v ee clk din dout le clr v cc v cc v ee lvcc_ hv_ com_ lvee_ no_ ** * (single channel)
14 _____________________________________________________________________________________ max4936Cmax4939 octal high-voltage transmit/receive switches latch clear (clr) drive clr logic-high to reset the contents of the latch to zero and open all t/r switches. clr does not affect the contents of the shift register. once clr is high again, and le is driven low, the contents of the shift register are loaded into the latch. power-on reset the devices feature a power-on-reset circuit to ensure all switches are off at power-on. the internal 12-bit serial shift register and latch are set to zero on power-up. figure 4. latch-enable interface timing figure 3. diode bias current control le clk dout d11'?d0' from previous data power-up default: d11?d0 = 0 din d11 msb lsb d10 d9 d11' d10' d9' d0 d1 d0' d1' d11 s3 r3 s2 lvcc (lvee) diode bridge r2 s1 r1 s0 r0
______________________________________________________________________________________ 15 max4936Cmax4939 octal high-voltage transmit/receive switches table 1. serial interface programming l = low, h = high, x = dont care. table 2. diode bias current * v ee = -v cc data bits control bits function d0 (lsb) d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d11 (msb) le clr sw1 sw2 sw3 sw4 sw5 sw6 sw7 sw8 s0 s1 s2 s3 l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on l l l off h l l on x x x x x x x x x x x x h l hold previous state x x x x x x x x x x x x x h off off off off off off off off off off off off switches resistors ( i ) resistor combination typical diode bridge current (ma) vs. s[3:0] control bits (*) s3 s2 s1 s0 r3 r2 r1 r0 ( i ) v cc = 3.0v v cc = 5.0v 0 0 0 0 350 700 1400 2800 0 0 0 0 0 1 350 700 1400 2800 2800 0.78 1.50 0 0 1 0 350 700 1400 2800 1400 1.58 3.00 0 0 1 1 350 700 1400 2800 933 2.36 4.50 0 1 0 0 350 700 1400 2800 700 3.14 6.00 0 1 0 1 350 700 1400 2800 560 3.98 7.50 0 1 1 0 350 700 1400 2800 467 4.72 9.00 0 1 1 1 350 700 1400 2800 400 5.50 10.50 1 0 0 0 350 700 1400 2800 350 6.28 12.00 1 0 0 1 350 700 1400 2800 311 7.08 13.50 1 0 1 0 350 700 1400 2800 280 7.86 15.00 1 0 1 1 350 700 1400 2800 255 8.64 16.50 1 1 0 0 350 700 1400 2800 233 9.42 18.00 1 1 0 1 350 700 1400 2800 215 10.22 19.50 1 1 1 0 350 700 1400 2800 200 11.00 21.00 1 1 1 1 350 700 1400 2800 187 11.78 22.50
16 _____________________________________________________________________________________ max4936Cmax4939 octal high-voltage transmit/receive switches applications information for medical ultrasound applications, see figures 5, 6, and 7. ultrasound-specific imd3 specification unlike typical communications applications, the two input tones are not equal in magnitude for the ultrasound-spe - cific imd3 two-tone specification. in this measurement, f1 represents reflections from tissue and f2 represents reflections from blood. the latter reflections are typically 25db lower in magnitude, and hence the measurement is defined with one input tone 25db lower than the other. the imd3 product of interest (f1 - (f2 - f1)) presents itself as an undesired doppler error signal in ultrasound applications. see figure 8. logic levels the digital interface inputs clk, din, le , and clr are tolerant of up to +5.5v, independent of the v dd supply voltage, allowing compatibility with higher voltage con - trollers. daisy-chaining multiple devices digital output dout is provided to allow the connec - tion of multiple devices by daisy-chaining (figure 9). connect each dout to the din of the subsequent device in the chain. connect clk, le , and clr inputs of all devices, and drive le logic-low to update all devices simultaneously. drive clr high to open all the switches simultaneously. additional shift registers can be includ - ed anywhere in series with the device data chain. supply sequencing and bypassing the devices do not require special sequencing of the v dd , v cc, and v ee supply voltages; however, analog switch inputs must be unconnected, or satisfy v ee p (v hv_ , v com_ , v no_ ) p v cc during power up and power down. bypass v dd , v cc , and v ee to gnd with a 1 f f ceramic capacitor as close as possible to the device. pcb layout the pin configuration is optimized to facilitate a very compact physical layout of the device and its associated discrete components. a typical application for this device might incorporate several devices in close proximity to handle multiple channels of signal processing. the exposed pad (ep) of the tqfn-ep package provides a low thermal resistance path to the die. it is important that the pcb on which the device is mounted be designed to conduct heat from the ep. in addition, provide the ep with a low-inductance path to electrical ground. the ep must be soldered to a ground plane on the pcb, either directly or through an array of plated through holes. figure 5. ultrasound t/r path with one transmit per receive channel (one channel only) application diagrams v ee gnd v cc no_ hv_ clk din dout clr le com_ v dd relay mux connectors hv mux transducers spi control -5v xmt rcv +5v +3v hv mux hv mux max4936/max4938
______________________________________________________________________________________ 17 max4936Cmax4939 octal high-voltage transmit/receive switches figure 6. ultrasound t/r path with one transmit per receive channel and external isolation (one channel only) application diagrams (continued) figure 7. ultrasound t/r path with multiple transmits per receive channel v ee gnd v cc no_ clk din dout clr le com_ v dd relay mux connectors hv mux transducers spi control -5v rcv xmt +5v +3v hv mux hv mux max4937/max4939 receive path transmit path < 100v com_ com_ hv_ < 100v hv_ no_ < 500mv no_ < 500mv relay mux connectors hv mux transducers hv mux hv mux max4936 lna driver driver v cc v ee v cc v ee v cc v ee v cc v ee
18 _____________________________________________________________________________________ max4936Cmax4939 octal high-voltage transmit/receive switches application diagrams (continued) figure 9. interfacing multiple devices by daisy-chaining chip information process: bcdmos package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. figure 8. ultrasound imd3 measurement technique max4936- max4939 le le clk clk clr max4936- max4939 max4936- max4939 le clk din le clk din din din clr clr clr dout dout dout u_ u2 u1 package type package code outline no. land pattern no. 56 tqfn-ep t56511+1 21-0187 90-0087 ultrasound imd3 -25db f1 - (f2 - f1) f1 f2 f2 + (f2 - f1)
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 19 ? 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. max4936Cmax4939 octal high-voltage transmit/receive switches revision history revision number revision date description pages changed 0 9/10 initial release 1 3/11 updated the diode bridge turn-off time and the no_ on capacitance in the electrical characteristics , updated figure 7 3, 4, 17

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